1. Field of the Invention
The present invention relates to electrically programmable, non-volatile memory and integrated circuits including such memory, and more particularly to a memory cell structure and method of operation based upon programmable resistance induced by progressive breakdown of ultra-thin dielectric layers and related structures.
2. Description of Related Art
Electrically programmable non-volatile memory technologies are being adapted to many applications. The various technologies vary in the number of times that the memory cells can be programmed, the voltages required to achieve programming, and the number of bits of data stored in each memory cell. Also, an important consideration in determining whether to apply a particular memory technology is the manufacturing steps required to form the memory cells and supporting circuitry.
Memory technologies based upon floating gates like standard EEPROM, or charge trapping layers like oxide-nitride-oxide memory cells, are typically programmable many times. However, these technologies require complex programming and erasing circuitry, and employ complex charge pump techniques to achieve the voltages required for programming and erasing. Also, when storing more than one bit of data per memory cell, complex programming and sensing technologies are required. Finally, with respect to these types of flash memory, manufacturing steps needed to form the memory cells often include expensive steps not normally required for forming standard logic circuitry, such as CMOS logic, on the same integrated circuit.
A simple electrically programmable memory cell structure has been described by de Graaf, et al., “A Novel High-Density Low-Cost Diode Programmable Read-only Memory,” IEDM 1996, pages 7.6.1-7.6.4. According to de Graaf, et al., a one-time programmable high-density memory can be achieved using a diode-antifuse structure that consists of a first n-type polysilicon electrode, a second p-type diffusion electrode, and a layer of dielectric such as about 60 Angstroms of thermally grown silicon dioxide between the electrodes. In this structure, the memory cells are programmed by applying high-voltage, around 13 volts, to induce breakdown of the dielectric layer, and thereby forming a physical connection between electrodes of programmed cells. Although the de Graaf, et al., structure is compact and easy to manufacture, it allows only one-time programming, and requires high-voltage operation.
It is desirable to provide electrically programmable non-volatile memory cell technologies that can be operated at low voltages, and can be made using processes more compatible with standard CMOS logic manufacturing techniques. Also, is desirable that such non-volatile memory cell technologies provide for programming multiple times, and/or storing more than one bit per memory cell.